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TBPIC16

The TBPIC16 is an efficient and high performance, technology and vendor independent 8-bit microcontroller supplied as a synthesisable IP core. It is software compatible with the industry standard PIC16xxxx family of 8-bit PIC ® microcontrollers. It offers both firmware (object) and timing compatibility with the original devices.

TBPIC16 is supplied as high quality synthesisable VHDL source code, with full self-checking testbench, example implementation and synthesis scripts, makefiles, documentation, maintenance and support.

  

Features

TBPIC16 is a standard configuration of our FlexPIC16 configurable microcontroller. It offers the smallest implementation of a PIC code-compatible microcontroller core with the following features:

  • Small area requirement (275 slices / 3800 gates*)
  • Single phase clock input (>150MHz*)
  • Code compatibility with original devices
  • Timing compatibility with original devices, including instruction cycle, interrupt latency, general purpose IO port and peripheral timing
  • All 35 instructions implemented
  • All instructions except branches execute in a single instruction cycle (>37MIPs*)
  • All branches execute in two instruction cycles
  • Fixed 3 instruction cycles interrupt latency
  • RISC-like, Harvard architecture
  • Watchdog timer (WDT)
  • Low power SLEEP mode with wakeup by interrupt or watchdog timer
  • General purpose IO ports with configurable widths(PORTA, PORTB, PORTC)
  • Interrupt-on-change feature and provision for programmable pull-ups on PORTB.
  • 8-bit counter/timer (TIMER0) with prescaler, externally or internally clocked
  • Full interrupt support from peripherals and external interrupt source
  • 14-bit instruction, 8-bit data widths
  • 8 level hardware stack (max. unlimited)**
  • 368 bytes register-file (1K bytes address space)**
  • 8K words program memory (max. 64K words)**  
  
* with quoted stack, register-file and program memory sizes, when implemented in a Xilinx Spartan 3AN FPGA. Gate count is for 2-input NAND equivalent gates in ASIC standard cell. Performance is limited to 110MHz (27MIPs) for full IO port output timing compatibility.
** typical sizes quoted, user configurable size to suit application 

  

Benefits

  • Technology and vendor independent
  • Suitable for FPGA (Xilinx, Altera, Lattice, Actel etc), ASIC or custom IC implementation.
  • High quality parameterised and well commented VHDL RTL source code
  • Readily extensible to add additional RAM, peripherals, or other custom interfaces
  • Further standard peripherals developed to customer order
  • Wide availability of PIC code library routines from multiple sources
  • Wide availability of development tools from multiple vendors, including software simulators, assemblers, C-compilers, emulators etc.  
  
  
PIC is a registered trademark of Microchip Technology Inc. 

 Applications

Typical applications include industrial sensors, user interfaces, peripheral controllers, communications and anywhere that small size combined with high performance 8-bit processing is required.

The code and timing compatibility of the TBPIC16 with orginal PIC devices will facilitate cost-reduction and enhancement of existing designs as well as allowing the flexibility to add custom hardware peripherals to the system. The typically significantly increased performance over standard parts will permit enhancements to the functionality and user experience.  

 

Performance

The TBPIC16 can be readily implemented on any FPGA, ASIC or custom silicon device as required by the user. Representative area and performance figures for various target technologies are shown in the table below.

Technology

Area excl. memories (note 1)

Area incl. memories (notes 1,2)

Speed (MIPs)

ASIC standard cell

3800

n/a

-

Xilinx Spartan 3AN

275

439

37

Notes:

1. Areas are quoted in native units. For ASIC technologies this is 2-input NAND equivalent gatecount. For Xilinx area is quoted in slices.

2. Area including stack and data memories implemented as random logic (eg. slice RAM in Xilinx Spartan) instead of using dedicated memory cells, but excluding program memory.

  

Licensing

TBPIC is available to license at cost-effective rates on a royalty-free basis, either for single designs, multiple designs, or on a perpetual basis. Please contact us to discuss your requirements.

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